FPGA Firmware Differences

This page lists some of the major functional differences between the various FPGA functions on the Cisco Nexus 3550-F Fusion (formerly ExaLINK Fusion) and Cisco Nexus 3550-F Fusion HPT (formerly ExaLINK Fusion HPT) products.

Cisco Nexus 3550-F Fusion

This table is based on Nexus 3550-F firmware version 1.9.0.

Feature Function mux Function switch Function switch-1g Function fastmux
mux objects Unlimited * Unlimited Unlimited 4
switch objects No Unlimited with switch license ** Unlimited with switch license ** No
patch/tap objects Yes (<5ns) Yes (<5ns) Yes (<5ns) Yes (<5ns)
mirror objects Yes Yes Yes No
10G port support Yes Yes Yes Yes
1G port support Yes No Yes No
VLAN support Yes Yes Yes No
Num upstream mux ports 4 Unlimited Unlimited 4
Num mirror objects with timestamping output 4 4 0
Minimum cut-through latency (+/- ~3ns) 92ns
(down-up, 10G-10G, no VLAN)		 86ns
(mux-object, 10G-10G, no VLAN)		 86ns
(mux-object, 10G-10G, no VLAN)		 39.00ns (+/- 0.25ns)
102ns
(up-down layer2 mode, 10G-10G, no VLAN)		 95ns
(switch object, 10G-10G, no VLAN)		 95ns
(switch object, 10G-10G, no VLAN)
Maximum cut-through latency (+/- ~3ns) 92ns
(down-up, 10G-10G, no VLAN)		 120ns
(48 port mux object, 10G-10G, no VLAN)		 120ns
(48 port mux object, 10G-10G, no VLAN)		 55.50ns (+/-0.25ns)
102ns
(up-down layer2 mode, 10G-10G, no VLAN)		 126ns
(48 port switch object, 10G-10G, no VLAN)		 126ns
(48 port switch object, 10G-10G, no VLAN)
FPGA on-chip packet buffering >=1.2MByte >=1.5MByte >=0.75MByte >=64KByte
Software sending messages through dataplane(e.g. LLDP, BGP, IGMP) Yes Yes Yes No

* There is a limitation of 4 upstream ports with mux firmware. Please refer to Mux objects for further details.

** A switch license is required to create switch objects. A switch license is included when ordering the Nexus 3550-F in the Switch SKU.

Cisco Nexus 3550-F Fusion HPT

This table is based on Nexus 3550-F HPT firmware version 1.12.0.

Feature Function hpt Function hpt-40g
mux objects No No
switch objects No No
mirror objects 1 1
patch/tap objects Yes (<5ns) Yes (<5ns)
Max number of 1G input ports 40 0
Max number of 10G input ports 40 24
Max number of 40G input ports 0 4*
10G output ports 1-8 (User selectable) 1-8 (User selectable)
Deep buffering 32GByte DDR4 32GByte DDR4
Timestamp precision <100ps <100ps

* 40G inputs only supported on QSFP Line Cards ports.